CoreGEV-Tx10 GigE Vision FPGA IP Core

Transmit uncompressed images over GigE Vision at up to 10 Gbps

Pleora’s CoreGEV-Tx10 GigE Vision FPGA IP Core with Flexible Hybrid Accelerator Architecture helps manufacturers shorten time-to-market, reduce risk, and lower costs by providing robust, low latency and high performance GigE Vision® transmit capability for their sensor system.

The FGPA IP Core supports up to 10 Gbps transmission of uncompressed images over a standard Ethernet connection. CoreGEV-Tx10 is compliant with the GigE Vision and GenICam™ standards, enabling seamless interoperability in multi-vendor networked or point-to-point digital video systems. A flexible, dynamically generated, fully customizable GenICam XML file approach allows users to quickly and easily add custom features.

Hybrid FPGA Accelerator Architecture

Pleora’s unique hybrid FPGA accelerator implementation allows users to bring the sensor up using the onboard processor only and a pure software approach for rapid prototyping. Once the FPGA implementation is complete, users switch the software driver to “FPGA Acceleration” mode, using the FPGA to offload the video streaming and enabling up to 10 Gbps of low latency transmission of uncompressed images. The software only method can also be used on slower sensors within a family of sensors, reducing development costs and ensuring a consistent interface for software applications across an entire sensor family or families.

Complete End-to-End Solution

Image streams transmitted by CoreGEV-Tx10 FPGA IP need to be received by the final application, often running on a host PC. Pleora’s eBUS™ Software Development Kit (SDK) is a feature-rich application development toolkit providing comprehensive APIs for controlling GigE Vision sensors and for efficiently receive image streams for processing by the host CPU or GPU. By using eBUS, manufacturers can further shorten time to market and development costs for interfacing their end applications to their sensor.

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